Bài giảng Vi xử lý - Chương 3: Họ vi điều khiển 8051 - Bùi Minh Thành

Nội dung text: Bài giảng Vi xử lý - Chương 3: Họ vi điều khiển 8051 - Bùi Minh Thành

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6. O • Khả năng lái là 4 tải TTL loại LS (Low Power Schottky) với các cổng P1, P2, và P3; và 8 tải TTL loại LS với cổng P0. • Chú ý là điện trở kéo lên bên trong không có trong Port 0 (ngoại trừ lúc làm việc như bus dữ liệu / địa chỉ bên ngoài). Điện trở kéo lên có thể được sử dụng với P0 tùy theo đặc tính vào của thiết bị mà nó lái.
7. Writing “1” to Output Pin P1.X Read latch Vcc TB2 Load(L1) 2. output pin is 1. write a 1 to the pin Vcc 1 Internal CPU D Q P1.X bus P1.X pin 0 output 1 Write to latch Clk Q M1 TB1 Read pin 8051 IC
8. Reading “High” at Input Pin Read latch Vcc 2. MOV A,P1 TB2 external pin=High 1. write a 1 to the pin MOV Load(L1) P1,#0FFH 1 1 Internal CPU bus D Q P1.X pin P1.X 0 Write to latch Clk Q M1 TB1 Read pin 3. Read pin=1 Read latch=0 Write to latch=1 8051 IC
9. Other Pins • P1, P2, and P3 have internal pull-up resisters. – P1, P2, and P3 are not open drain. • P0 has no internal pull-up resistors and does not connects to Vcc inside the 8051. – P0 is open drain. – Compare the figures of P1.X and P0.X.  • However, for a programmer, it is the same to program P0, P1, P2 and P3. • All the ports upon RESET are configured as output.
10. Port 0 with Pull-Up Resistors Vcc 10 K P0.0 Port DS5000 P0.1 P0.2 8751 P0.3 P0.4 0 8951 P0.5 P0.6 P0.7
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23. eoe eaeoe oe MOV DPTR,#7521h MOV DPL,#21H MOV DPH, #75 COUNT EQU 30 ~ ~ mov R4, #COUNT MOV DPTR,#MYDATA ~ ~ 0RG 200H MYDATA:DB “HELLO”
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25. Addressing Modes eoe eaaae aoo Mov a, 70h ; copy contents of RAM at 70h to a Mov R0,40h ; copy contents of RAM at 40h to a Mov 56h,a ; put contents of a at 56h Mov 0D0h,a ; put contents of a into PSW
26. Eo ooaoo ooaoo ooaooo e “ ” a MOV DIRECT, DIRECT
27. E Show the code to push R5, R6, and A onto the stack and then pop them back into R2, R3, and B, where register B = register A, R2 = R6, and R3 = R5. ooa ooa eeooa oooaoee oeeee oooao o oooao o
28. eoe eee eeoeo eaooeo ee MOV R0,A MOV A,R7 ADD A,R4 ADD A,R7 MOV DPTR,#25F5H MOV R5,DPL MOV R1,DPH Note that MOV R4,R7 is incorrect
29. oo oo oeeooeoae oaeoe eeeeeeeeae eaoeaaeee Acc a Rn ooeeoaaeee Rn eeoaoe e ;Use the following : MOV A, R7 MOV R4,A MOV R4,07H ; this is direct addressing mode
30. eoe eee eaeoeoeo eaoeeee eeeoo ae mov psw, #0 ; use register bank 0 mov r0, #3Ch mov @r0, #3 ; M[3Ch]  3 eeeo aee mov dptr, #9000h ; dptr  9000h movx a, @dptr ; a  M[9000h] oe aaaeeeaeo
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32. Program memory ACC ACC Addresses 10 ⊕⊕⊕ 22 200 ADD A, @R0 R0 R0 201 31 31 Data memory 30 31 12 Before After 32 8051 Internal data memory
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34. oooE register indirect addressing mode without a loop oaae oaeoe oooaooo eeoeo oooaooo eeoeo oooaooo eeoeo oooaooo eeoeo oooaooo
35. Eoo eaoaeeoea oaoaaae oaoe oaoe eaoaooo eeoe oooeeo ; clear one ram location at address 60h CLR A MOV R1,#60h MOV @R1,A Setup a loop using DJNZ and register R7 as counter
36. oo oeeoaeaea dynamic data structures aaaae aaaeaaaeoe oeeaeeeaaooe aeoaaaeeeaooeao oeooaoaeaoaee Register or direct addressing (eg. MOV A, 30H ) cannot be used , since they require operand addresses to be known at assemble-time.
37. eoe eeeeoe oe aeaeaeo ORG 1000h 1000 mov a, #5 PC 1002 movc a, @a + PC ;a  M[1008] 1003 Nop ooae o aea ea oeeo
38. Example: MOVC A,@A+DPTR Program memory ACC ACC 00 10 ⊕⊕⊕ 56 DPTR 41 56 31 Before After 2000 MOVC A, @A + DPTR 2001
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40. eoao eeaeaee e a ee oe oa ae o ee oe 0703 E500 mov a,00h 0705 8500E0 mov acc,00h 0708 8500E0 mov 0e0h,00h oo 070B E9 mov a,r1 070C 89E0 mov acc,r1 070E 89E0 mov 0e0h,r1
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44. Eo o Oo SJMP NXT Jump to relative address with the label 'NXT'; this is an unconditional jump and is always taken. DJNZ R1, DWN Decrement register R1 by 1 and jump to the relative address specified by the label 'DWN' if the result of R1 is not zero. 0035
45. o ACALL address11 ORG 00H ; reset location AJMP address11 LJMP START ; 3 bytes instruction ORG 3FFEH START: ACALL FORWARD ; 2 bytes instruction ; now code address at 4000H LJMP TEST ORG 47FFH ; 01000 1111111111B FORWARD: RET ORG 5800H ; 01011 00000000000B BACKWARD: RET ORG 5FFDH TEST: ACALL BACKWARD ; 2 bytes instruction ; now code address at 5FFFH SJMP $ END
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