Bài giảng Vi xử lý - Chương 5: Thiết kế hệ vi xử lý (Phần 1)

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1. Chương 5 Thiếtkế hệ vi xử lý 1
2. 5.1 Giảimãđịachỉ • Khi vi xử lý gửimột địachỉ ra bus địachỉ, thì thông tin này phải được chuyển thành lệnh cụ thể cho thiếtbị cụ thể. Giảimãđịachỉ thựchiệntácvụ này. Nó sử dụng thông tin bus địachỉđểxác định thiếtbị nào sẽđượctruycập. 3
3. Thí dụ: TK mạch giải mã địa chỉ •Vớibảng bộ nhớ sau, hãy thiếtkế mạch giảimãtoànphầnvà mạch giảimãmộtphần cho các chip bộ nhớ (RAM 4KB và ROM 16KB) và I/O 5
4. Thí dụ giải mã địa chỉ toàn phần 7
5. Thí dụ giải mã địa chỉ mộtphần 9
6. Hardware dùng cho mạch giải mã địa chỉ •Cổng logic Æ mạch phứctạp •Mạch giải mã (Decoder) – TD:74LS138, •Mạch so sánh (Comparator) •ROM Æ thừachứcnăng • PLD: PLA, PAL, Æ cho đáp ứng nhanh 11
7. Mộtsố chân điều khiểnbộ nhớ Bộ nhớ (và hầuhết các thiếtbị ngoại vi) có các đường điềukhiển đặcbiệt để giao tiếpvớivi xử lý • /CS hoặc/CE(Chip Select hoặc Chip Enable) – đượcláibởimạch giảimãđịachỉ từ vi xử lý. –thường là tích cựcthấp –khiđượcxácđịnh, thì chip/ngoạivi đượcchọn. • /OE (Output Enable=cho phép xuất) hay /RD (vớiRAM) –thường thấy trong các bộ nhớ – khi nó tích cực(thường là tích cựcthấp) thì ngõ ra ở trạng thái hi-Z. – đôi khi nó đượcxemnhư /RD trong RAM. • /WR (Write Enable=cho phép ghi) – đượcláibởi/WR củavi xử lý 13
8. TD: Giao tiếp 8051 với RAM HM 6264 và ROM 27C256 15
9. Giao tiếpbộ nhớ vớimạch giải mã địa chỉ là PLD 17
10. Công tắc/khóa (hay phím đơn) ở các chân cổng I/O 19
11. Kếtnốitốithiểuchocác hệ thống dùng 89C51/52 21
12. SWITCH ON I/O PORTS (2/2) •Good Circuit It is always best connecting the switch to ground with a pull-up resistor as shown in the "Good" circuit. When the switch is open, the 10k resistor supplies very small current needed for logic 1. When it is closed, the port pin is short to ground. The voltage is 0V and all the sinking current requirement is met, so it is logic 0. The 10k resistor will pass 0.5 mA (5 Volt/10k ohm). Thus the circuits waste very little current in either state. The drawback is that the closure of switch gives logic 0 and people like to think of a switch closure gives logic 1. But this is not a matter because it is easy to handle in software. •Fair circuit The "Fair" circuit requires that the pull-down resistor be very small. Otherwise, the pin will rise above 0.9V when the resistor passes the 1.6mA sinking current. When the switch is closed, the circuit waste a large current since virtually no current flows into the pin. The only advantage is that a switch closure gives logic 1. •Poor circuit In the "Poor" circuit, the logic 1 is stable when the switch is closed. But when the switch is open, the input floats to a noise-sensitive high rather than a low. An open TTL pin is usually read as logic 1 but the pin may picks up noise like an antenna. To conclude, driving a TTL input should always consider current sinking (pulling input to 0V). 23
13. Giao tiếpvới bàn phím hex 25
14. Giao tiếpvới bàn phím hex Dạng sóng ở các bit cổng xuấtP1.0 đến P1.3 27
15. Chương trình quét bàn phím cnvrt: MOV A, R1 ; khôi phụcphímđọc được MOV R3, #0 ; xóa bộ đếmbảng clup: JNB ACC.0, cnvrt2 ; xong vớisố đếmchính RR A ; xoay giá trị MOV R2, A ; cấtgiátrị đượcxoay MOV A, R3 ; tăng bộ đếm thêm 1 ADD A, #4 ; cộng 4 cho mỗicột MOV R3, A ; cất số đếm MOV A, R2 ; lấy lại giá trị xoay SJMP c1up cnvrt2: MOV A, R1 ; khôi phục phím đọc được. SWAP A ; hoán đổi 2 nửa byte c1up2: JNB ACC.0, xlat; nhảy đến dịch phím đọc được RR A ; xoay để tìm bit 0 INC R3 ; tăng số đếm thêm 1 SJMP c1up2 ; nhảy đến kiểm tra bit kế xlat: MOV A, R3 ; lấy số đếm MOV DPTR, #keytab ; chỉ đến bảng dịch MOVC A, @A+DPTR ; lấy ký tự được dịch RET 29
16. Mộtdạng bàn phím (keypad hay keyboard) 31
17. Interfacing to the Keyboard • It is the function of the microcontroller to scan the keyboard continuously to detect and identify the key pressed • To detect a pressed key, the microcontroller grounds all rows by providing 0 to the output latch, then it reads the columns – If the data read from columns is D3 –D0 = 1111, no key has been pressed and the process continues till key press is detected – If one of the column bits has a zero, this means that a key press has occurred • For example, if D3 –D0 = 1101, this means that a key in the D1 column has been pressed • After detecting a key press, microcontroller will go through the process of identifying the key 33
18. Interfacing to the Keyboard 35
19. Interfacing to the Keyboard 37
20. Interfacing to the Keyboard 39
21. Interfacing to the Keyboard Last program for detection and identification of key activation goes through the following stages: 1.To make sure that the preceding key has been released, 0s are output to all rows at once, and the columns are read and checked repeatedly until all the columns are high  When all columns are found to be high, the program waits for a short amount of time before it goes to the next stage of waiting for a key to be pressed 41
22. Interfacing to the Keyboard 3.To detect which row key press belongs to, it grounds one row at a time, reading the columns each time  If it finds that all columns are high, this means that the key press cannot belong to that row –Therefore, it grounds the next row and continues until it finds the row the key press belongs to  Upon finding the row that the key press belongs to, it sets up the starting address for the look-up table holding the scan codes (or ASCII) for that row 4.To identify the key press, it rotates the column bits, one bit at a time, into the carry flag and checks to see if it is low  Upon finding the zero, it pulls out the ASCII code for that key from the look-up table  otherwise, it increments the pointer to point to the next 43 element of the look-up table
23. Simple Switch Matrix 45
24. Multiplexing a Switch Matrix 47
25. Phầnxuất/nhậpsố vớiVXL 49
26. Chip giao tiếpIO Bus địa chỉ IO có thể trùng hoặc khác bus địa chỉ dùng cho bộ nhớ chính. 51
27. Các kiểucổng IO •Mộtcổng IO có thể có nhiềuchânIO; mỗi chân tương ứng với 1 bit dữ liệu. • Có 3 kiểu chân IO: – Các chân chỉ nhập – Các chân chỉ xuất – Các chân 2 chiều •Mộtcổng IO có thể chứa nhiều chân có các kiểuhỗnhợp. 53
28. Các chân xuất (dùng mạch chốt) 55
29. Bouncing Contacts • Push-button switches, toggle switches, and electromechanical relays all have one thing in common: contacts. • Metal contacts make and break the circuit and carry the current in switches and relays. Because they are metal, contacts have mass. • Since at least one of the contacts is movable, it has springiness. • Since contacts are designed to open and close quickly, there is little resistance (damping) to their movement 57
30. Why is it a problem? • If such a switch is used as a source to an edge-triggered input such as INT0, then the MCS-51 will think that there were several “events” and respond several times. • The bouncing of the switch may last for several milliseconds. – Given that the MCS-51 operates at microsecond speed, a short ISR may execute several times in response to the above described bounciness 59
31. Hardware Solution 61
32. Mở rộng xuấtnhập song song với 8255 PPI 63
33. 8255 • 8051 has limited number of I/O ports • one solution is to add parallel interface chip(s) • 8255 is a Programmable Peripheral Interface PPI • Add it to 8051 to expand number of parallel ports • 8051 I/O port does not have handshaking capability • 8255 can add handshaking capability to 8051 65
34. 8255 69
35. 8255 73
36. 8255 77
37. Mode 0 • Provides simple input and output operations for each of the three ports. – No “handshaking” is required, data is simply written to or read from a specified port. – Two 8-bit ports and two 4-bit ports. – Any port can be input or output. – Outputs are latched. – Inputs are not latched 79
38. 8255 mode 1 (output) 81
39. Timing diagram for mode1(output) 83
40. Mode 1 – Control Signals • Input Control Signal Definition – STB (Strobe Input). (C4 for A, C2 for B) • A “low” on this input loads data into the input latch. – IBF (Input Buffer Full F/F) (C5 for A, C1 for B) • A “high” on this output indicates that the data has been loaded into the input latch; in essence, an acknowledgement from the 8255 to the device. – INTR (Interrupt Request) (C3 for A, C0 for B) • A “high” on this output can be used to interrupt the CPU when an input device is requesting service. 85
41. Mode 2 - Strobed Bidirectional Bus I/O • MODE 2 Basic Functional Definitions: – Used in Group A only. – One 8-bit, bi-directional bus port (Port A) and a 5-bit control port (Port C). – Both inputs and outputs are latched. – The 5-bit control port (Port C) is used for control and status for the 8-bit, bi-directional bus port (Port A). 87
42. BSR Mode example Move dptr, 0093h Up: Move a, 09h ;set pc4 Movx @dptr,a Acall delay Mov a,08h ;clr pc4 Movx @dptr,a Acall delay Sjmp up 91
43. Interfacing 8255 with 8051 P2.7(A15) A2 P2.6(A14) A1 P2.5(A13) A0 74138 8051 3×8 decoder /CS 8255 ALE O0 A0 74373 O1 A1 P0.7-P0.0 D7-D0 O7 (AD7-AD0) D7-D0 /RD /RD /WR /WR 93
44. 5.6 Giao tiếpbộ hiểnthị (Display) 5.6.1 Giao tiếpvớiLED 95
45. Giao tiếpvớiLED đơn 97
46. Mạch nhậptừ phím nhấn 99
47. LED ON I/O PORTS (1/2) 101
48. Example 1 • Connection -Switch -P1.0, LED - P2.0 • Condition - Turn on LED when switch is pressed. • Solution: SETB P2.0 ; LED OFF SETB P1.0 ; input pin. LOOP: JB P1.0, LOOP ; not grounded then ; stay in loop CLR P2.0 ; To clear pin P0.0 when ; P1.0 is at 0 v • Schematic Circuit? 103
49. Example 2 – Switch and LED Connection Port 0 is connected to eight LEDs, each of them is connected to 5V through a 330ohm resistor. Port 1 is connected to a DIP switch and a 10Kohm resistor Condition Corresponding LED should light up when switch pressed , i.e. if Switch at 1.0 is pressed -> LED at P0.0 should light up. Solution: ; To configure port 1 for input. MOV P1, #0FFH LOOP: MOV A, P1 MOV P0, A SJMP LOOP ; Stay in ;infinite loop 105
50. 7 Segment Display INTRODUCTION For the seven segment display you can use the LT-541 or LSD5061- 11 chip (etc ). Each of the segments of the display is connected to a pin on the 8051 (the schematic shows how to do this). In order to light up a segment on the the pin must be set to 0V. To turn a segment off the corresponding pin must be set to 5V. This is simply done by setting the pins on the 8051 to '1' or '0'. LED displays are – Power-hungry (10ma per LED) – Pin-hungry (8 pins per 7-seg display) But they are cheaper than LCD display 7-SEG Display are available in two types: Common anode (CA) & common cathode (CC), but command anode display are most suitable for interfacing with 8051 since 8051 port pins can sink current better than sourcing it. 107
51. The 7-segment Display (Cont.) • 7-segment displays come in 2 configurations: Common Anode (CA) Common Cathode (CC) • As we have seen, it would be preferable to connect the cathode of each diode to the output pin. • Therefore, the common anode variety would be better for our interfacing needs. 109
52. Use of current buffer • Interfacing to a DIP switch and 7-segment display • Output a ‘1’to ON a segment • We can use 74244 to common cathode 7_seg 111
53. Creating Digit Pattern with 7-segment LED Display For displaying Digit say 7 we need to light segments: a ,b, c. Since we are using Common anode display , to do so we have to to provide Logic 0 (0 v) at anode of these segments. So need to clear pins: P1.0 ,P1.1,P1.2. that is 1 1 1 1 1 0 0 0 Î F8h . Connection Hex Code You can also do this for some characters like A ,E but not for D or B because it will be same as that of 0 & 8 . So this is one of limitation of 7-seg display. Since we can Enable only one 7-seg display at a time ,we need to scan these display at fast rate .The scanning frequency should be high enough to be flicker-free. At least 30HZ .Therefore – time one digit is ON is 1/30 seconds 113
54. INTERFACING TO LED DISPLAY (2/2) Connection: a:h to port p1.0:p1.7 , D0:D1 to p3.0:p3.1. To Display: Consider example of vending machine where we want to display number of soft drink bottles on display entered by customer. Suppose he enter 3 (03) bottles then we will use lookup table to see DIGIT PATTERN of these keys. So DIGI[1]=C0 (hex code for '0') & DIGI[2]=B0(hex code for '3'). Algorithm start : Disable [D0:D1] again : Enable D0 [a:h] - pattern for Digit1 Delay Disable D0. Enable D1 [a:h] - pattern for Digit2 Delay 115 Goto again
55. Chú ý vớihiểnthị dồnkênh Vớihiểnthị LED dồn kênh: • Ở mỗithời điểmchỉ có mộthiểnthị LED 7 đoạn đượccho phép (qua các khóa điệntử BJT). • Các ngõ vào a-h nối chung với nhau cho tấtcả các LED 7 đoạn. •Tổng số chân cổng cầnsử dụng là 8 + số ký số (digit), vớithí dụ hình 5.80 thì tổng số chân là 8 + 4 = 12. •Tầnsố quét phải đủ cao để tránh tình trạng thấy LED nhấp nháy: •tốithiểu40Hz •thời gian cho 1 digit sáng là 1/40 giây. •tầnsố quét cao hơn thì sẽ giảmsự nhấp nháy 117
56. Mạch này dùng LED 7 đoạnloại nào? (CA hay CC) 119
57. BasicBasic OutputOutput TechniquesTechniques withwith LEDsLEDs +5V EA VCC Reset P1.7 P1.6 P1.5 8051 P1.4 P1.3 XTAL1 P1.2 XTAL2 P1.1 P1.0 VSS 121
58. ProgramProgram ListingListing forfor ExampleExample 33 Start ORG 0000H CLR A Set A = 00 LOOP: MOV P1, A CPL A ACALL DELAY Move the content AJMP LOOP of A to P1 DELAY: MOV R6, #250 DL1: MOV R7, #200 DL2: DJNZ R7, DL2 Delay for 0.1s DJNZ R6, DL1 RET Invert the END content of A Assume 12MHz clock, determine the delay time. Time delay, Tex1 = 1 + [ ( 1+ 200 * 2 ) + 2 ] * 250 + 2 = 100,753 MachineCycle123
59. ExampleExample 5:5: Use a Look-up Table 125
60. ExampleExample 6:6: BasicBasic InputInput TechniqueTechnique +5V EA VCC P1.7 Reset P1.6 P1.5 P1.4 P1.3 8051 P1.2 P1.1 P1.0 XTAL1 P3.7 SW1 XTAL2 P3.6 SW2 P3.5 SW3 P3.4 SW4 VSS 127
61. FlowFlow ChartChart ofof ExampleExample 66 2 Start Y SW1 closed? SW1 Handler Initialization N Y 1 2 SW2 closed? SW2 Handler Set P3 as input port N Y SW3closed? SW3 Handler Read SW1∼SW4 status N Y SW4 closed? SW4 Handler N 1 129
62. Ex7:Ex7: 77 SegmentSegment LEDLED NumericNumeric DisplayDisplay Eprom Version Of 8051 R3 is used as a counter, write a 8051 assembly language program using look-up table method, to display the value in R3 to a 7-segment display 131
63. Một số thí dụ các mạch giao tiếp IO 133
64. Giao tiếp với động cơ DC 135
65. Giao tiếp với DAC 137
66. Mạch điều khiển động cơ DC đi kèm DAC 139